SH7730 Datasheet, PDF (694/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 21 Serial I/O with FIFO (SIOF)
(2) Control by Secondary FS (Slave Mode 2)
The CODEC normally outputs the SIOFSYNC signal as synchronization pulse (FS). In this
method, the CODEC outputs the secondary FS specific to the control data transfer after 1/2 frame
time has been passed (not the normal FS output timing) to transmit or receive control data. This
method is valid for SIOF slave mode. The following summarizes the control data interface
procedure by the secondary FS.
• Transmit normal transmit data of LSB = 0 (the SIOF forcibly clears 0).
• To execute control data transmission, send transmit data of LSB = 1 (the SIOF forcibly set to 1
by writing SITCDR).
• The CODEC outputs the secondary FS.
• The SIOF transmits or receives (stores in SIRCDR) control data (data specified by SITCDR)
synchronously with the secondary FS.
Figure 21.8 shows an example of the control data interface timing by the secondary FS.
1/2 frame
1 frame
1/2 frame
SIOFSCK
SIOFSYNC
SIOFTXD
SIOFRXD
Normal FS
Secondary FS
L-channel
data
Slot
No.0
Control
channel 0
Slot
LSB = 1 (Secondary FS request) _No.0
Specifications: TRMD[1:0] = 01, REDG = 0,
FL[3:0] = 1110 (Frame length: 128 bits),
TDLE = 1,
TDLA[3:0] = 0000, TDRE = 0, TDRA[3:0] = 0000,
RDLE = 1,
RDLA[3:0] = 0000, RDRE = 0, RDRA[3:0] = 0000,
CD0E = 1,
CD0A[3:0] = 0000, CD1E = 0, CD1A[3:0] = 0000
Figure 21.8 Control Data Interface (Secondary FS)
Normal FS
Rev. 1.00 Sep. 19, 2007 Page 646 of 1136
REJ09B0359-0100