SH7730 Datasheet, PDF (804/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 23 Serial Communication Interface with FIFO A (SCIFA)
When modem control is enabled, transmission can be stopped and restarted in accordance with the
CTS input value. When CTS is set to 1, if transmission is in progress, the line goes to the mark
state after transmission of one frame. When CTS is set to 0, the next transmit data is output
starting from the start bit.
Figure 23.10 shows an example of the operation when modem control is used.
Transmit data
TxD
CTS
Start
bit
0 D0 D1
Parity Stop
bit bit
D6 D7 0/1
Transmission stops
when CTS goes high
Start
bit
0 D0 D1
D6 D7 0/1
Transmission starts again
when CTS goes low
Figure 23.10 Example of CTS Control Operation
When modem control is enabled, the RTS signal goes high after the number of receive FIFO
(SCAFRDR) has exceeded the number of RTS output triggers.
Transmit data
TxD
Start
bit
0 D0 D1
Parity Stop
bit bit
D6 D7 0/1
RTS
RTS goes high when receive data is RTS goes low when receive data is
at least number of RTS output triggerless than number of RTS output trigger
Figure 23.11 Example of RTS Control Operation
Rev. 1.00 Sep. 19, 2007 Page 756 of 1136
REJ09B0359-0100