SH7730 Datasheet, PDF (864/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 25 SIM Card Module (SIM)
Figure 25.1 shows a block diagram of the smart card interface.
Module data bus
Peripheral bus
SIM_D
SIM_CLK
SIM_RST
SCRDR
SCTDR
SCRSR
SCTSR
Parity
generation
Parity check
SCSMR
SCSCR
SCSSR
SCSCMR
SCSC2R
SCWAIT
SCGRD
SCDMAEN
SCBRR
SCSMPL
Baud rate
generator
Serial clock
ERI
TXI
RXI
TEI
Receive data full
Transmit data empty
[Legend]
SCSCMR: Smart card mode register
SCRSR: Receive shift register
SCRDR: Receive data register
SCTSR: Transmit shift register
SCTDR: Transmit data register
SCSMR: Serial mode register
SCSCR: Serial control register
SCSC2R:
SCSSR:
SCBRR:
SCWAIT:
SCGRD:
SCSMPL:
SCDMAEN:
Serial control 2 register
Serial status register
Bit rate register
Wait time register
Guard extension register
Sampling register
DMA enable register
Figure 25.1 Smart Card Interface
Pφ
Interrupt
controller
DMA controller
Rev. 1.00 Sep. 19, 2007 Page 816 of 1136
REJ09B0359-0100