SH7730 Datasheet, PDF (878/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 25 SIM Card Module (SIM)
Bit
1
0
Note:
Bit Name
Initial
Value R/W
Description
WAIT_ER 0
R/(W*) Wait Error
Indicates the wait timer error status.
0: Indicates that the interval between the start of two
successive characters has not exceeded the etu set
by SCWAIT.
[Clearing conditions]
• On reset
• When 0 is written to the WAIT_ER flag
1: Indicates that the interval between the start of two
successive characters has exceeded the etu set by
SCWAIT.
[Setting conditions]
• In T = 0 mode, when the interval between the start
of a character to be received and immediately
preceding transmitted or received character
exceeds the (value of 60 × SCWAIT: Operation wait
time) etu.
• In T = 1 mode, when the interval between the start
of two successive received characters exceeds the
(SCWAIT value: Character protection time) etu.
Note: Even if the RE bit in SCSCR is cleared to 0, the
WAIT_ER flag is unaffected, and the previous
state is retained.

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
* Writing only 0 is possible to clear the flag.
25.3.7 Receive Shift Register (SCRSR)
SCRSR is a register that receives serial data.
The smart card interface receives serial data input from the SIM_RXD pin in order, from the LSB
or MSB, and sets it in SCRSR, converting it to parallel data. When reception of one byte of data is
completed, the data is automatically transferred to SCRDR.
Rev. 1.00 Sep. 19, 2007 Page 830 of 1136
REJ09B0359-0100