SH7730 Datasheet, PDF (833/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 24 IrDA Interface (IrDA)
24.3.7 IrDA-SIR10 Status Register (IRIF_SIR3)
IRIF_SIR3 is a register that indicates an error in the width of the received infrared pulse during
infrared pulse demodulation.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
— — — — — — — — — — — — — — — IRERR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit
15 to 1
Bit Name
—
0
IRERR
Initial
Value
All 0
0
R/W Description
R Reserved
These bits are always read as 0. The write value should
always be 0.
R Error Flag for Width of Received Infrared Pulse
Indicates an error in the width of the received pulse
during infrared pulse demodulation.
0: No error has occurred.
1: An error has occurred.
24.3.8 Hardware Frame Processing Set Register (IRIF_SIR_FRM)
IRIF_SIR_FRM is a register that specifies the processing of received data frames.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
— — — — — — EOFD FRER — — — — — — — FRP
Initial value: 0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R/W
Bit
Bit Name
15 to 10 —
Initial
Value
All 0
R/W Description
R Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.00 Sep. 19, 2007 Page 785 of 1136
REJ09B0359-0100