SH7730 Datasheet, PDF (883/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 25 SIM Card Module (SIM)
25.3.12 Wait Time Register (SCWAIT)
SCWAIT is a 16-bit readable/writable register. If the interval between the start of two successive
characters exceeds the set value (in etu units), a wait time error is generated.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
SCWAIT[15:0]
Initial value: 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
15 to 0
Bit Name
Initial
Value R/W
SCWAIT[15:0] H'FFFF R/W
Description
Wait Time Register
In T = 0 mode, the operation wait time can be set in this
register. If the interval between the start of characters to
be received and transmitted or received characters
immediately before exceeds the (60 × the value set in
this register) etu, the WAIT_ER flag is set to 1.
However, if SCWAIT is set to H'0000, the WAIT_ER
flag is set after 60 etu.
In T = 1 mode, the character wait time can be set in this
register. If the interval between the start of two
successive received characters exceeds the (the value
set in this register) etu, the WAIT_ER flag is set to 1.
However, if SCWAIT is set to H'0000, the WAIT_ER
flag is set after 1 etu.
25.3.13 Sampling Register (SCSMPL)
SCSMPL is a 16-bit readable/writable register that sets the number of serial clock cycles per etu.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—————
SCSMPL[10:0]
Initial value: 0
0
0
0
0
0
0
1
0
1
1
1
0
0
1
1
R/W: R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Rev. 1.00 Sep. 19, 2007 Page 835 of 1136
REJ09B0359-0100