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SH7730 Datasheet, PDF (1135/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series
Section 33 Electrical Characteristics
Tr
Tc1
Tc2
Tc3
Tc4
Tc5
Tc6
Tc7
Tc8
CKO
A23 to A0
A12/A11*1
CSn
RDWR
RAS
CAS
DQMx
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
Row
Column Column Column Column Column Column Column Column
Address Address1 Address2 Address3 Address4 Address5 Address6 Address7 Address8
tAD1
tAD1
tAD1
tCSD1
WRITE
Command
tCSD1
tRWD1
tRWD1
tRASD1
tRASD1
tCASD1
tCASD1
tDQMD1
tRWD1
tRASD1
tCASD1
tDQMD1
tWDD2
tWDD2
tWDD2
tWDD2
tWDD2
tWDD2
tWDD2
tWDD2
D15 to D0
BS
tBSD
tWDH2
tWDH2
tWDH2
tWDH2
tWDH2
tWDH2
tWDH2
tWDH2
tBSD
CKE
tDACD
DACKn*2
Notes: 1. Address pin that is connected to A10 of SDRAM.
2. Waveform when active low is specified for DACKn.
(High)
tDACD
Figure 33.27 Burst Write Bus Cycle of SDRAM (Single Write × 8)
(Bank Active Mode: ACTV + WRIT Command, TRCD = 1 Cycle)
Rev. 1.00 Sep. 19, 2007 Page 1087 of 1136
REJ09B0359-0100