SH7730 Datasheet, PDF (798/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 23 Serial Communication Interface with FIFO A (SCIFA)
In serial transmission, the SCIFA operates as described below.
1. When data is written into SCAFTDR, the SCIFA transfers the data from SCAFTDR to
SCATSR and starts transmitting. Confirm that the TDFE flag in SCASSR is set to 1 before
writing transmit data to SCAFTDR. The number of data bytes that can be written is (64 –
transmission trigger number setting).
2. When data is transferred from SCAFTDR to SCATSR and transmission is started, consecutive
transmit operations are performed until there is no transmit data left in SCAFTDR. When the
number of transmit data bytes in SCAFTDR falls below the transmission trigger number set in
SCAFCR, the TDFE flag is set. If the TIE bit in SCASCR is set to 1 at this time, a transmit-
FIFO-data-empty interrupt request is generated.
When the number of transmit data bytes matches the data set in SCATDSR while the transmit
data stop function is used, the transmit operation is stopped and the TSF flag in SCASSR is
set. When the TSIE bit in SCASCR is set to 1, transmit data stop interrupt request is generated.
A common interrupt vector is assigned to the transmit-FIFO-data-empty interrupt and the
transmit-data-stop interrupt.
The serial transmit data is sent from the TXD pin in the following order.
A. Start bit: One-bit 0 is output.
B. Transmit data: 8-bit or 7-bit data is output in LSB-first order.
C. Parity bit: One parity bit (even or odd parity) is output. (A format in which a parity bit is
not output can also be selected.)
D. Stop bit(s): One- or two-bit 1s (stop bits) are output.
E. Mark state: 1 is output continuously until the start bit that starts the next transmission is
sent.
3. The SCIFA checks SCAFTDR transmit data at the timing for sending the stop bit. If data is
present, the data is transferred from SCAFTDR to SCATSR, the stop bit is sent, and then serial
transmission of the next frame is started.
If there is no transmit data, the TEND flag in SCASSR is set to 1, the stop bit is sent, and then
the line goes to the mark state in which 1 is output continuously.
Figure 23.4 shows an example of the operation for transmission in asynchronous mode.
Rev. 1.00 Sep. 19, 2007 Page 750 of 1136
REJ09B0359-0100