SH7730 Datasheet, PDF (92/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 2 Programming Model
2.4 Data Formats in Registers
Register operands are always longwords (32 bits). When a memory operand is only a byte (8 bits)
or a word (16 bits), it is sign-extended into a longword when loaded into a register.
76
0
S
31
76
0
S
S
15 14
0
S
31
15 14
0
S
S
Figure 2.6 Formats of Byte Data and Word Data in Register
2.5 Data Formats in Memory
Memory data formats are classified into bytes, words, and longwords. Memory can be accessed in
an 8-bit byte, 16-bit word, or 32-bit longword form. A memory operand less than 32 bits in length
is sign-extended before being loaded into a register.
A word operand must be accessed starting from a word boundary (even address of a 2-byte unit:
address 2n), and a longword operand starting from a longword boundary (even address of a 4-byte
unit: address 4n). An address error will result if this rule is not observed. A byte operand can be
accessed from any address.
Big endian or little endian byte order can be selected for the data format. The endian should be set
with the external pin after a power-on reset. The endian cannot be changed dynamically. Bit
positions are numbered left to right from most-significant to least-significant. Thus, in a 32-bit
longword, the leftmost bit, bit 31, is the most significant bit and the rightmost bit, bit 0, is the least
significant bit.
The data format in memory is shown in figure 2.7.
Rev. 1.00 Sep. 19, 2007 Page 44 of 1136
REJ09B0359-0100