SH7730 Datasheet, PDF (343/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 11 Bus State Controller (BSC)
Initial
Bit
Bit Name Value R/W Description
27 to 25 IWRWD 011
[2:0]
R/W Idle Cycles for Another Space Read-Write
Specify the number of idle cycles to be inserted after
the access to a memory that is connected to the space.
The target access cycle is a read-write one in which
continuous accesses switch between different spaces.
000: No idle cycle inserted
001: 1 idle cycles inserted
010: 2 idle cycles inserted
011: 4 idle cycles inserted
100: 6 idle cycles inserted
101: 8 idle cycles inserted
110: 10 idle cycles inserted
111: 12 idle cycles inserted
24 to 22 IWRWS 011
[2:0]
R/W Idle Cycles for Read-Write in Same Space
Specify the number of idle cycles to be inserted after
the access to a memory that is connected to the space.
The target cycle is a read-write cycle of which
continuous accesses are for the same space.
000: No idle cycle inserted
001: 1 idle cycles inserted
010: 2 idle cycles inserted
011: 4 idle cycles inserted
100: 6 idle cycles inserted
101: 8 idle cycles inserted
110: 10 idle cycles inserted
111: 12 idle cycles inserted
Rev. 1.00 Sep. 19, 2007 Page 295 of 1136
REJ09B0359-0100