SH7730 Datasheet, PDF (524/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 14 Reset and Power-Down Modes
Initial
Bit
Bit Name Value
25
MSTP225 1
24
MSTP224 1
23, 22 
All 1
21
MSTP221 1
20
MSTP220 1
19 to 17 
All 1
16
MSTP216 1
15 to 0 
All 1
R/W
R/W
R/W
R
R/W
R/W
R
R/W
R
Description
Module Stop Bit 225
Clearing this bit to 0 starts supply of the clock signal to
the IrDA0.
0: IrDA0 operates
1: Clock supply to IrDA0 halted
Module Stop Bit 224
Clearing this bit to 0 starts supply of the clock signal to
the IrDA1.
0: IrDA1 operates
1: Clock supply to IrDA1 halted
Reserved
These bits are always read as 1. The write value should
always be 1.
Module Stop Bit 221
Clearing this bit to 0 starts supply of the clock signal to
the TPU0.
0: TPU0 operates
1: Clock supply to TPU0 halted
Module Stop Bit 220
Clearing this bit to 0 starts supply of the clock signal to
the TPU1.
0: TPU1 operates
1: Clock supply to TPU1 halted
Reserved
These bits are always read as 1. The write value should
always be 1.
Module Stop Bit 216
Clearing this bit to 0 starts supply of the clock signal to
the SIM.
0: SIM operates
1: Clock supply to SIM halted
Reserved
These bits are always read as 1. The write value should
always be 1.
Rev. 1.00 Sep. 19, 2007 Page 476 of 1136
REJ09B0359-0100