SH7730 Datasheet, PDF (549/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 16 16-Bit Timer Pulse Unit (TPU)
16.4.3 Timer I/O Control Register (TPUn_TIOR)
TPUn_TIOR register controls the TPUn_TO0 to TPUn_TO3 pins, and has one TPUn_TIOR in
each channel. The TPUn_TIOR is initialized to H'0000 at a reset.
The TPUn_TIOR register setting should be made only while TPUn_TCNT operation is stopped.
Note that the setting of TPUn_TMDR may affect TPUn_TIOR.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—————————————
IOA[2:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 3 
All 0 R
Reserved
These bits are always read as 0 and cannot be
modified.
2 to 0 IOA[2:0] 000
R/W I/O Control
Bits IOA2 to IOA0 specify the functions of TPUn_TGRA
and the TPUn_TO0 to TPUn_TO3 pins. For details, see
table 16.7.
Rev. 1.00 Sep. 19, 2007 Page 501 of 1136
REJ09B0359-0100