SH7730 Datasheet, PDF (110/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 3 Instruction Set
Table 3.7 Shift Instructions
Instruction
ROTL Rn
ROTR Rn
ROTCL Rn
ROTCR Rn
SHAD Rm,Rn
SHAL
SHAR
SHLD
Rn
Rn
Rm,Rn
SHLL Rn
SHLR Rn
SHLL2 Rn
SHLR2 Rn
SHLL8 Rn
SHLR8 Rn
SHLL16 Rn
SHLR16 Rn
Operation
T ← Rn ← MSB
LSB → Rn → T
T ← Rn ← T
T → Rn → T
When Rm ≥ 0, Rn << Rm → Rn
When Rm < 0, Rn >> Rm → [MSB →
Rn]
T ← Rn ← 0
MSB → Rn → T
When Rm ≥ 0, Rn << Rm → Rn
When Rm < 0, Rn >> Rm →
[0 → Rn]
T ← Rn ← 0
0 → Rn → T
Rn << 2 → Rn
Rn >> 2 → Rn
Rn << 8 → Rn
Rn >> 8 → Rn
Rn << 16 → Rn
Rn >> 16 → Rn
Instruction Code
0100nnnn00000100
0100nnnn00000101
0100nnnn00100100
0100nnnn00100101
0100nnnnmmmm1100
0100nnnn00100000
0100nnnn00100001
0100nnnnmmmm1101
0100nnnn00000000
0100nnnn00000001
0100nnnn00001000
0100nnnn00001001
0100nnnn00011000
0100nnnn00011001
0100nnnn00101000
0100nnnn00101001
Privileged
—
—
—
—
—
T Bit
MSB
LSB
MSB
LSB
—
—
MSB
—
LSB
—
—
—
MSB
—
LSB
—
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Rev. 1.00 Sep. 19, 2007 Page 62 of 1136
REJ09B0359-0100