SH7730 Datasheet, PDF (787/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 23 Serial Communication Interface with FIFO A (SCIFA)
Synchronous Mode:
N=
Pφ
× 10⁶ - 1
4 × 2^2n-1 × B
B:
Bit rate (bits/s)
N: SCABRR setting for baud rate generator
Asynchronous mode: 0 ≤ N ≤ 255
Synchronous mode: 1 ≤ N ≤ 255
Pφ: Peripheral module operating frequency (MHz)
n:
Baud rate generator input clock (n = 0 to 3)
(See the table below for the relation between n and the clock.)
Table 23.4 SCASMR Setting
n
Clock Source
0
Pφ
1
Pφ/4
2
Pφ/16
3
Pφ/64
SCASMR Setting
CKS[1:0]
00
01
10
11
Find the bit rate error in asynchronous mode by the following formula:
1. When sampling rate is 1/16
Error (%) =
Pφ × 10⁶
- 1 × 100
(1+N) × B × 32 × 2^2n-1
2. When sampling rate is 1/5
Error (%) =
Pφ × 10⁶
- 1 × 100
(1+N) × B × 10 × 2^2n-1
3. When sampling rate is 1/11
Error (%) =
Pφ × 10⁶
- 1 × 100
(1+N) × B × 22 × 2^2n-1
Rev. 1.00 Sep. 19, 2007 Page 739 of 1136
REJ09B0359-0100