SH7730 Datasheet, PDF (329/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Name
I/O
WE3/DQMUU/ICIO O
WR
WE2/DQMUL/
O
ICIORD
WE1/DQMLU/WE O
WE0/DQMLL
O
RAS
O
CAS
O
CKE
O
IOIS16
I
WAIT
I
BREQ
I
BACK
O
MD5, MD3
I
REFOUT
O
Section 11 Bus State Controller (BSC)
Function
Indicates that D31 to D24 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Corresponds to signals D31 to D24 when SDRAM is connected.
Functions as the I/O write strobe signal when the PCMCIA is used.
Indicates that D23 to D16 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Corresponds to signals D23 to D16 when the SDRAM is used.
Functions as the I/O read strobe signal when the PCMCIA is used.
Indicates that D15 to D8 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Corresponds to signals D15 to D8 when the SDRAM is used.
Functions as the memory write enable signal when the PCMCIA is
used.
Indicates that D7 to D0 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Corresponds to select signals D7 to D0 when the SDRAM is used.
Connects to RAS pin when SDRAM is connected.
Connects to CAS pin when SDRAM is connected.
Connects to CKE pin when SDRAM is connected.
PCMCIA 16-bit I/O signal
Valid only in little endian mode.
Pulled low in bit endian mode.
External wait input
Bus request input
Bus acknowledge output
MD5: Selects data alignment (big endian or little endian)
MD3: Specifies area 0 bus width (16/32 bits)
Refresh request output when a bus is released
Rev. 1.00 Sep. 19, 2007 Page 281 of 1136
REJ09B0359-0100