SH7730 Datasheet, PDF (416/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 11 Bus State Controller (BSC)
CKO
A25 to A0
A12/A11*¹
CSn
RAS
CAS
RDWR
DQMxx
D31 to D0
BS
DACKn*²
Td1
Td2
Td3
Td4
Tnop Tc1
Tc2
Tc3
Tc4
Tde
Notes: 1. Address pin to be connected to the A10 pin of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 11.20 Burst Read Timing (Bank Active, Same Row Address)
Rev. 1.00 Sep. 19, 2007 Page 368 of 1136
REJ09B0359-0100