SH7730 Datasheet, PDF (318/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 10 Interrupt Controller (INTC)
Program execution state
Yes
ICR1.MAI = 1?
No
NMI input is
Yes
low?
No
No
Interrupt
generated?
Yes
SR.BL = 0,
Yes
sleep mode,
or standby mode?
No _{ICR0.NMIB = 1?}
Yes
No
NMI?
Yes
Set interrupt source code
in INTEVT
Save SR to SSR;
save PC to SPC
Branch to
exception handling routine
NMI?
Yes
No
Level 15
No
interrupt?
Yes
Level 14
No
interrupt?
SR.IMASK level
is 14 or lower?
Yes
Level 1
No
interrupt?
No
SR.IMASK level
Yes
Yes ^{is 13 or lower?}
No
Yes
SR.IMASK level
is 0?
No
Figure 10.3 Interrupt Operation Flowchart (when CPUOPM.INTMU = 0)
Rev. 1.00 Sep. 19, 2007 Page 270 of 1136
REJ09B0359-0100