PXD10RM Datasheet, PDF (985/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Offset channel_base + 0x04
Access: Read/Write
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R TVL31 TVL30 TVL29 TVL28 TVL27 TVL26 TVL25 TVL24 TVL23 TVL22 TVL21 TVL20 TVL19 TVL18 TVL17 TVL16
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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R TVL15 TVL14 TVL13 TVL12 TVL11 TVL10 TVL9 TVL8 TVL7 TVL6 TVL5 TVL4 TVL3 TVL2 TVL1 TVL0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Field
TVLn
Figure 27-4. Current Timer Value Register (CVAL)
Table 27-5. CVAL Field Descriptions
Description
Current Timer Value. These bits represent the current timer value. Note that the timer uses a
downcounter.
NOTE: The timer values will be frozen in Debug mode if the FRZ bit is set in the PIT Module Control
Register (see Figure 27-2)
27.3.2.4 Timer Control Register (TCTRL)
These register contain the control bits for each timer.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
27-5