PXD10RM Datasheet, PDF (1061/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

30.5.3.2 Flash Programming
In all cases the memory sector to be written needs to be erased first. The programming sequence itself is
then initiated in the following way:
1. Check that the TX Buffer is empty. If the QSPI_SFMSR[TXNE] bit is set the TX Buffer must be
cleared by writing 1 into the QSPI_MCR[CLR_TXF] bit.
2. Program the address related to the command in the QSPI_SFAR register. Optionally one can clear
the QSPI_TBSR[TRCTR] field by writing 1 into QSPI_MCR[CLR_TXF].
3. Provide initial data for the program command into the circular buffer via register TX Buffer Data
Register (QSPI_TBDR). At least one word of data must be written into the TX Buffer.
4. Program the required instruction code options (i.e. size of data) into the QSPI_ICR[ICO] register.
5. Trigger the IP Command to program the serial flash device by writing the instruction code into the
QSPI_ICR[IC] register.
6. Depending from the amount of data required step 3 must be repeated until all the required data have
been written into the QSPI_TBDR register. At any time the QSPI_TBDR[TRCTR] field can be
read to check how many words have been written actually into the TX Buffer.
Steps 4 and 5 may be executed together.
Upon writing the QSPI_ICR[IC] field (refer to step 5) the QuadSPI module will start to execute the
command by transferring instruction code, address and then data to the external device. The data are
fetched from the TX Buffer. It consists of 15 entries with 32-bit and is organized as a circular FIFO, whose
read pointer is incremented after each fetch. When all data are transmitted, the QuadSPI module will return
from ‘busy’ to ‘idle’. However, this is not true for the external device since the internal programming is
still ongoing. It is up to the user to monitor the relevant status information available from the serial flash
device and to ensure that the programming is finished properly.
30.5.3.3 Flash Read
Host access to the data stored in the external serial flash device is done in two steps: First the data must be
read into the internal buffers and in the second step these internal buffers can be read by the host.
30.5.3.3.1 Reading Serial Flash Data into the QuadSPI Module
Read access to the external serial flash device can be triggered in two different ways:
• IP Command Read: For flash read via the register interface the user must provide the required
components of a SFM command to the QSPI_SFAR and the QSPI_ICR registers. All available read
commands supported by the external serial flash are possible.
Optionally it is possible to clear the RX Buffer pointer prior to triggering the IP Command by
writing a 1 into the QSPI_MCR[CLR_RXF] bit.
From these inputs the complete transaction is built when the QSPI_ICR[IC] field is written. The
transaction related to the read access starts and the requested number of bytes is fetched from the
external serial flash device into the RX Buffer. Since the read access is triggered via the register
interface the IP_ACC status bit is set driving in turn the BUSY bit (both are located in the
QSPI_SFMSR register).
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
30-57