PXD10RM Datasheet, PDF (528/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 16-1. ECSM memory map
ECSM Offset
Register
0x00
0x08
0x0c
0x10
0x14
0x18
0x1c
0x20
0x24
0x28
0x2c - 0x3c
0x40
0x44
0x48
0x4c
0x50
0x54
0x58
0x5c
0x60
0x64
0x68
0x6c
0x70 - 0x7c
Processor Core Type
(PCT)
Revision (REV)
Reserved
Reserved
Reserved
Misc Reset Status
(MRSR)
Reserved
Misc Wakeup Control
(MWCR)
Reserved
Reserved
Reserved
Misc Interrupt
(MIR)
Reserved
Miscellaneous User-Defined Control Register (MUDCR)
Reserved
Reserved
Reserved
ECC Configuration
(ECR)
Reserved
ECC Status
(ESR)
Reserved
ECC Error Generation (EEGR)
Reserved
Flash ECC Address (FEAR)
Reserved
Flash ECC Master
(FEMR)
Flash ECC Attributes
(FEAT)
Reserved
Flash ECC Data (FEDR)
RAM ECC Address (REAR)
Reserved
RAM ECC Syndrome
(RESR)
RAM ECC Master
(REMR)
RAM ECC Attributes
(REAT)
Reserved
RAM ECC Data (REDR)
Reserved
16.4.2 Register description
Attempted accesses to reserved addresses result in an error termination, while attempted writes to
read-only registers are ignored and do not terminate with an error. Unless noted otherwise, writes to the
16-2
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor