PXD10RM Datasheet, PDF (1294/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table B-2. Detailed register map (continued)
Register Description
Register Name
Used
Size
Address
Reserved
FXOSC Section 8.5.3, Register description
High Frequency Oscillator Control Register
Reserved
SXOSC Section 8.6.4, Register description
-
OSC_CTL
-
- (Base+0x0129) -
(Base+0x014F)
0xC3FE_0000
32-bit Base+0x0000
- (Base+0x0004) -
(Base+0x003F)
0xC3FE_0040
Low Frequency Oscillator Control Register
Reserved
OSC_CTL
-
32-bit Base+0x0000
- (Base+0x0004) -
(Base+0x005F)
RC Digital Interface Registers Section 8.8.3, Register Description)
RC Digital Interface Registers
RC_CTL
-
Reserved
LPRC Digital Interface Section 8.7.3, Register descriptionn
Low Power RC Control Register
Reserved
LPRC_CTL
-
PLLD0 Section 8.9.5, Register description
Control Register
PLLD Modulation Register
Reserved
PLLD0_CR
PLLD0_MR
-
CMU0 Section 8.10.5, Memory Map and Register Description
Control Status Register
CMU0_CSR
Frequency Display Register
CMU0_FDR
High Frequency Reference Register
CMU0_HFREFR_A
0xC3FE_0060
32-bit Base+0x0000
- (Base+0x0004) -
(Base+0x007F)
0xC3FE_0080
32-bit Base+0x0000
- (Base+0x0004) -
(Base+0x009F)
0xC3FE_00A0
32-bit Base + 0x0000
32-bit Base + 0x0004
- (Base+0x0008) -
(Base+0x00FF)
0xC3FE_0100
32-bit Base + 0x0000
32-bit Base + 0x0004
32-bit Base + 0x0008
Low Frequency Reference Register
CMU0_LFREFR_A 32-bit Base + 0x000C
Interrupt Status Register
CMU0_ISR
32-bit Base + 0x0010
Interrupt Mask Register
CMU0_IMR
32-bit Base + 0x0014
Measurement Duration Register
CMU0_MDR
32-bit Base + 0x0018
Reserved
-
- (Base+0x001C) -
(Base+0x036F)
Clock Generation Module (MC_CGM) Section 8.4.3, Memory Map and Register Definition 0xC3FE_0370
Output Clock Enable Register
CGM_OC_EN
32-bit Base + 0x0000
B-28
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor