PXD10RM Datasheet, PDF (359/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Field
4–11
TRANS
12–15
BPP
17–27
LUOFFS
29
BB
30–31
AB
Table 12-9. CtrlDescL0_4 Field Descriptions (continued)
Description
Transparency Level. Specifies the alpha value for the layer. This value may be used by the
blending engine to blend pixels on this layer. Value can vary between 0-255 where 0 is
completely transparent and 255 is completely opaque.
Bits Per Pixel
4’b0000 = 1 bpp
4’b0001 = 2 bpp
4’b0010 = 4 bpp
4’b0011 = 8 bpp
4’b0100 = 16 bpp (RGB565)
4’b0101 = 24 bpp
4’b0110 = 32 bpp (ARGB8888)
4’b0111 = Transparency mode 4 bpp
4’b1000 = Transparency mode 8bpp
4’b1001 = Luminance offset mode 4 bpp
4’b1010 = Luminance offset mode 8 bpp
4’b1011 = 16 bpp (ARGB1555)
4’b1100 = 16 bpp (ARGB4444)
4’b1101-1111 = Reserved
Look Up Table offset. Value gives the offset to the start address of the CLUT or tile (when used
in internal tile mode) in the CLUT/TILE RAM.
Chroma Keying
1’b1: ON
1’b0: OFF
Alpha Blending
2’b00: No alpha Blending
2’b01: Blend only the pixels selected by chroma keying in case BB=1’b1
2’b10: Blend the whole frame
2’b11: Same functionality as 2’b00.
12.3.4.5 Control Descriptor L0_5 Register
Figure 12-8 represents the control Descriptor L0_5 register. This register sets the maximum Chroma
Keying values for RGB.
Refer to Section 12.4.5.5, Alpha and Chroma-key blending,” for a description of Chroma Keying.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
12-27