PXD10RM Datasheet, PDF (817/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Figure 22-23 shows an example of waveform with 1/1 duty and 1/1 bias ratios with the additional contrast
adjustment phases
1 Frame
1 Frame
BP0
BP0
FPx (xxx0)
FPx (xxx0)
FPy (xxx1)
FPy (xxx1)
= Contrast Adjustment Phase
Figure 22-23. Contrast Adjustment Phases
NOTE
RMS stands for root mean square and is a statistical measure of the
magnitude of a varying quantity. It is calculated with the formula:
V_RMS =
T
 ^V2dt
-⁰-------------
T
Eqn. 22-3
22.5.4 LCD RAM
For a segment on the LCD to be displayed, data must be written to the LCD RAM which is shown in
Section 22.4, Memory Map and Register Definition.” The bits in the LCD RAM correspond to the
segments that are driven by the frontplane and backplane drivers. Writing a ‘1’ to a given location will
result in the corresponding display segment being driven with a differential RMS voltage, based on
selected reference, necessary to turn the segment ON when the LCDEN bit is set and the corresponding
FP[n-1:0]EN bit is set. Writing a ‘0’ to a given location will result in the corresponding display segment
being driven with a differential RMS voltage necessary to turn the segment OFF. The LCD RAM is a dual
port RAM that interfaces with the internal address and data buses of the MCU. It is possible to read from
LCD RAM locations for scrolling purposes. Writing or reading of the LCDEN bit does not change the
contents of the LCD RAM. After a reset, the LCD RAM contents will be cleared.
22.5.5 LCD Driver System Enable and Frontplane Enable Sequencing
If LCDEN = 0 (LCD Driver System disabled) and the frontplane enable bit, FP[n-1:0]EN, is set, the
frontplane driver waveform will not appear on the output until LCDEN is set. If LCDEN = 1 (LCD Driver
System enabled), the frontplane driver waveform will appear on the output as soon as the corresponding
frontplane enable bit, FP[n-1:0]EN, in the registers FPENR0 and FPENR1 is set.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
22-31