PXD10RM Datasheet, PDF (925/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

25.3.2.6 Invalid Mode Transition Status Register (ME_IMTS)
Address 0xC3FD_C014
Access: Supervisor read/write
0
1
2
3
4
5
6
7
8
9
10
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13
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15
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
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0
0
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0
0
0
0
0
0
16
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31
R
0
0
0
0
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0
0
0
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0
W
Reset 0
w1c w1c w1c w1c w1c
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 25-7. Invalid Mode Transition Status Register (ME_IMTS)
This register provides the status bits for each cause of invalid mode interrupt.
Table 25-9. Invalid Mode Transition Status Register (ME_IMTS) Field Descriptions
Field
S_MTI
S_MRI
S_DMA
S_NMA
S_SEA
Description
Mode Transition Illegal status — This bit is set whenever a new mode is requested while some other mode
transition process is active (S_MTRANS is ‘1’). Please refer to Section 25.4.5, Mode Transition Interrupts for the
exceptions to this behavior. It is cleared by writing a ‘1’ to this bit.
0 Mode transition requested is not illegal
1 Mode transition requested is illegal
Mode Request Illegal status — This bit is set whenever the target mode requested is not a valid mode with
respect to current mode. It is cleared by writing a ‘1’ to this bit.
0 Target mode requested is not illegal with respect to current mode
1 Target mode requested is illegal with respect to current mode
Disabled Mode Access status — This bit is set whenever the target mode requested is one of those disabled
modes determined by ME_ME register. It is cleared by writing a ‘1’ to this bit.
0 Target mode requested is not a disabled mode
1 Target mode requested is a disabled mode
Non-existing Mode Access status — This bit is set whenever the target mode requested is one of those non
existing modes determined by ME_ME register. It is cleared by writing a ‘1’ to this bit.
0 Target mode requested is an existing mode
1 Target mode requested is a non-existing mode
SAFE Event Active status — This bit is set whenever the device is in SAFE mode, SAFE event bit is pending
and a new mode requested other than RESET/SAFE modes. It is cleared by writing a ‘1’ to this bit.
0 No new mode requested other than RESET/SAFE while SAFE event is pending
1 New mode requested other than RESET/SAFE while SAFE event is pending
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
25-19