PXD10RM Datasheet, PDF (1159/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

35.4.2 PWM Duty Cycle
The PWM duty cycle for the SMC channel x can be determined by dividing the decimal representation of
the bits MCDCx[DUTY] by the decimal representation of the bits MCPER[PER] and multiplying the
result by 100% as shown in Equation 35-1.
Effective PWM Channel X % Duty Cycle
=
---^D----^U-----^T----^Y-----
MCPER

100%
Eqn. 35-1
NOTE
x = PWM Channel Number = 0, 1, 2, 3 ... 11. This equation is only valid if
MCDCx[DUTY] <= MCPER[PER] and MCPER[PER] is not equal to 0.
Whenever MCDCx[DUTY] >= MCPER[PER], a constant low level (MCCTL1[RECIRC] = 0) or high
level (MCCTL1[RECIRC] = 1) will be output.
35.4.3 Motor Controller Counter Clock Source
Figure 35-32 shows how the PWM motor controller timer counter clock source is selected.
Clock
Generator
CLK
Peripheral
Bus
Clock f_BUS
Clocks and
Reset
Generator
Module
Motor Controller
Timer
Counter Clock
Prescaler Select
1
1/2
Motor Controller Timer
1/4
1/8
Counter Clock f_TC
MPPRE0, MPPRE1 _{Motor Controller Timer}
Counter Prescaler
11-Bit Motor Controller
Timer Counter
Figure 35-32. Motor Controller Counter Clock Selection
The peripheral bus clock is the source for the motor controller counter prescaler. The motor controller
counter clock rate, f_TC, is set by selecting the appropriate prescaler value. The prescaler is selected with
the MCCTL0[MCPRE] bits. The SMC channel frequency of operation can be calculated using
Equation 35-2 if MCCTL0[DITH] = 0.
Motor Channel Frequency (Hz)
=
-------------^f--^T--^C--------------
MCPER  M
Eqn. 35-2
The SMC channel frequency of operation can be calculated using Equation 35-3 if MCCTL0[DITH] = 1.
Motor Channel Frequency (Hz)
=
----------------^f---^T--^C-----------------
MCPER  M  2
Eqn. 35-3
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
35-31