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| PXD10RM Datasheet, PDF (1149/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller | |||
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PWM Channel x
MnC0P
MnC0M
Released
PWM Output
PWM Channel x + 1
MnC1P
MnC1M
Released
PWM Output
VDDM
VSSM
VDDM
Figure 35-18. Typical Quad Half H-Bridge Mode Configuration
VSSM
35.4.1.2 Relationship Between PWM Mode and PWM Channel Enable
The pair of SMC channels cannot be placed into dual full H-bridge mode unless both SMC channels have
been enabled (MCCCx[MCAM] not equal to 0) and dual full H-bridge mode is selected for both PWM
channels (MCCCx[MCOM] = 0x3). If only one channel is set to dual full H-bridge mode, this channel will
operate in full H-bridge mode, the other as programmed.
35.4.1.3 Relationship Between Sign, Duty, Dither, RECIRC, Period,
and PWM Mode Functions
35.4.1.3.1 PWM Alignment Modes
Each PWM channel can be programmed individually to three different alignment modes. The alignment
mode is determined by the MCCCx[MCAM] bits in the corresponding channel control register.
Left aligned (MCCCx[MCAM] = 0x1): The output will start active (low if MCCTL1[RECIRC] = 0 or high
if MCCTL1[RECIRC] = 1) and will turn inactive (high if MCCTL1[RECIRC] = 0 or low if
MCCTL1[RECIRC] = 1) after the number of counts specified by the corresponding duty cycle register.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
PreliminaryâSubject to Change Without Notice
35-21
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