PXD10RM Datasheet, PDF (287/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 11-1. Signal properties
Name
I/O Type
Function
Master Mode
Slave Mode
CS0_x
Output / input
Peripheral chip select 0
CS1:2_x
Output
Peripheral chip select 1–2
SIN_x
Input
Serial data in
SOUT_x
Output
Serial data out
SCK_x
Output / input
Serial clock (output)
1 _{The SIU allows you to select alternate pin functions for the device.}
Slave select
Unused¹
Serial data in
Serial data out
Serial clock (input)
11.6.2 Signal names and descriptions
11.6.2.1 Peripheral Chip Select / Slave Select (CS_0)
In master mode, the CS_0 signal is a peripheral chip select output that selects the slave device to which
the current transmission is intended.
In slave mode, the CS_0 signal is a slave select input signal that allows an SPI master to select the DSPI
as the target for transmission. CS_0 must be configured as input and pulled high. If the internal pullup is
being used then the appropriate bits in the relevant SIU_PCR must be set (SIU_PCR [WPE = 1],
[WPS = 1]).
Set the IBE and OBE bits in the SIU_PCR for all CS_0 pins when the DSPI chip select or slave select
primary function is selected for that pin. When the pin is used for DSPI master mode as a chip select output,
set the OBE bit. When the pin is used in DSPI slave mode as a slave select input, set the IBE bit.
11.6.2.2 Peripheral Chip Selects 1–2 (CS1:2)
CS1:2 are peripheral chip select output signals in master mode. In slave mode these signals are not used.
11.6.2.3 Serial Input (SIN_x)
SIN_x is a serial data input signal.
11.6.2.4 Serial Output (SOUT_x)
SOUT_x is a serial data output signal.
11.6.2.5 Serial Clock (SCK_x)
SCK_x is a serial communication clock signal. In master mode, the DSPI generates the SCK. In slave
mode, SCK_x is an input from an external bus master.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
11-5