English
Language : 

PXD10RM Datasheet, PDF (484/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller
The occurrence of any type of error causes the DMA engine to immediately stop, and the appropriate
channel bit in the DMA Error register to be asserted. At the same time, the details of the error condition
are loaded into the DMAES register. The major loop complete indicators, setting the transfer control
descriptor done flag and the possible assertion of an interrupt request, are not affected when an error is
detected. See Figure 15-3 and Table 15-3 for the DMAES definition.
Register address: DMA_Offset + 0x0004
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R VLD 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ECX
W
RESET: 0
0
16 17 18
R GPE CPE
W
RESET: 0 0 0
19 20 21 22
ERRCHN[0:5]
0000
23 24 25 26 27 28 29 30 31
SAE SOE DAE DOE NCE SGE SBE DBE
000000000
= Unimplemented
Figure 15-3. DMA Error Status (DMAES) Register
Name
VLD
ECX
GPE
CPE
ERRCHN[0:5]
SAE
SOE
Table 15-3. DMA Error Status (DMAES) field descriptions
Description
Logical OR of all DMAERRH and
DMAERRL status bits.
Transfer cancelled
Group Priority Error
Channel Priority Error
Error Channel Number or Cancelled
Channel Number
Source Address Error
Source Offset Error
Value
0 No DMAERR bits are set.
1 At least one DMAERR bit is set indicating a valid
error exists that has not been cleared.
0 No cancelled transfers.
1 The last recorded entry was a cancelled transfer via
the error cancel transfer input.
0 No group priority error.
1 The last recorded error was a configuration error
among the group priorities. All group priorities are
not unique.
0 No channel priority error.
1 The last recorded error was a configuration error in
the channel priorities within a group. All channel
priorities within a group are not unique.
The channel number of the last recorded error
(excluding GPE and CPE errors) or last recorded
transfer that was error cancelled.
0 No source address configuration error.
1 The last recorded error was a configuration error
detected in the TCD.saddr field. TCD.saddr is
inconsistent with TCD.ssize.
0 No source offset configuration error.
1 The last recorded error was a configuration error
detected in the TCD.soff field. TCD.soff is
inconsistent with TCD.ssize.
15-14
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor