PXD10RM Datasheet, PDF (130/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

INPCMP must be greater than or equal to 1 and INPLATCH must be less than INCMP (hardware
requirements).
The total conversion duration is (not including external multiplexing):
Tconv = Tsample + Teval + ndelay  T_ck
The timings refer to the unit T_ck, where f_ck = (1/2 x ADC peripheral set clock). The maximum clock
frequency is specified in Table 5-2.
Table 5-2. Max AD_clk frequency and related configuration settings
INPLATCH
0
0
1
1
1
1
1
1
INPCMP
1h
1h
2h
2h
3h
3h
3h
3h
INPSAMP
3h
4h
4h
5h
7h
7h
8h
9h
AD_clk f_max
(MHz)
20
20 + 4%
20 + 4%
20 + 4%
32 + 4%
40 + 4%
50 + 4%
60 + 4%
T_sample min.
(ns)
125
168
168
135
132
128
134
128
Table 5-3 lists the possible combinations by configuring the AD_clk at 60 MHz.
Table 5-3. ADC sampling and conversion timing
INPLATCH
INPCMP
INPSAMP
T_sample1
T_eval
ndelay
1
11
0000 1001
8 * Tck
30 * Tck
1 * Tck
1
11
0000 1010
9 * Tck
30 * Tck
1 * Tck
1
11
0000 1011
10 * Tck
30 * Tck
1 * Tck
1
11
0000 1100
11 * Tck
30 * Tck
1 * Tck
1
11
0000 1101
12 * Tck
30 * Tck
1 * Tck
1
11
0000 1110
13 * Tck
30 * Tck
1 * Tck
1
11
0000 1111
14 * Tck
30 * Tck
1 * Tck
...
...
...
...
...
...
1
11
1111 1100
251 * Tck
30 * Tck
1 * Tck
1
11
1111 1101
252 * Tck
30 * Tck
1 * Tck
1
11
1111 1110
253 * Tck
30 * Tck
1 * Tck
1
11
1111 1111
254 * Tck
30 * Tck
1 * Tck
1 _{Represents the number of clock cycles that this operation will last}
2 _{The ADC minimum conversion time at 60 MHz frequency is 39 * Tck; that corresponds to 650 ns.}
T_conv
39 * Tck²
40 * Tck
41 * Tck
42 * Tck
43 * Tck
44 * Tck
45 * Tck
...
282 * Tck
283 * Tck
284 * Tck
285 * Tck
PXD10 Microcontroller Reference Manual, Rev. 1
5-8
Freescale Semiconductor
Preliminary—Subject to Change Without Notice