PXD10RM Datasheet, PDF (224/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

8.10.5.3 High Frequency Reference Register FMPLL0 (CMU_HFREFR)
Address offset: 0x08
Reset value: 0x00000FFF
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
reserved
r
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
reserved
HFREF[11:0]
r
rw
Table 8-36. High Frequency Reference Register FMPLL0
Table 8-37. High Frequency Reference Register FMPLL0 field descriptions
Field
20-31
HFREF
Description
High Frequency reference value
These bits determine the high reference value for the FMPLL0 clock. The reference value
is given by: (HFREF[11:0]/16) * (FRC_fast/4).
8.10.5.4 Low Frequency Reference Register FMPLL0 (CMU_LFREFR)
Address offset: 0x0C
Reset value: 0x00000000
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
reserved
r
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
reserved
LFREF[11:0]
r
rw
Table 8-38. Low Frequency Reference Register FMPLL0
Table 8-39. Low Frequency Reference Register FMPLL0 field descriptions
Field
20-31
LFREF
Description
Low Frequency reference value
These bits determine the low reference value for the FMPLL0. The reference value is
given by: (LFREF[11:0]/16) * (FRC_fast/4).
8-46
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor