PXD10RM Datasheet, PDF (584/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

17.2.6.22 User Multiple Input Signature Register 4 (UMISR4)
Address Offset: 0x00058
Reset value: 0x00000000
0
1
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4
5
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15
MS159 MS158 MS157 MS156 MS155 MS154 MS153 MS152 MS151 MS150 MS149 MS148 MS147 MS146 MS145 MS144
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
16
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MS143 MS142 MS141 MS140 MS139 MS138 MS137 MS136 MS135 MS134 MS133 MS132 MS131 MS130 MS129 MS128
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
Figure 17-20. User Multiple Input Signature Register 4(UMISR4)
The Multiple Input Signature Register provides a mean to evaluate the Array Integrity.
The User Multiple Input Signature Register 4 represents the ECC bits of the whole 144 bits word (2 Double
Words including ECC): bits 8-15 are ECC bits for the odd Double Word and bits 24-31 are the ECC bits
for the even Double Word; bits 4-5 and 20-21 of MISR are respectively the double and single ECC error
detection for odd and even Double Word.
The UMISR4 Register is not accessible whenever MCR.DONE or UT0.AID are low: reading returns
indeterminate data while writing has no effect.
Table 17-30. UMISR4 field descriptions
Field
Description
0:31 MS159-128: Multiple input Signature 159-128 (Read/Write)
These bits represent the MISR value obtained accumulating:
the 8 ECC bits for the even Double Word (on MS135-128);
the single ECC error detection for even Double Word (on MS138);
the double ECC error detection for even Double Word (on MS139);
the 8 ECC bits for the odd Double Word (on MS151-144);
the single ECC error detection for odd Double Word (on MS154);
the double ECC error detection for odd Double Word (on MS155).
The MS can be seeded to any value by writing the UMISR4 register.
17.2.6.23 Non-volatile private censorship PassWord 0 register (NVPWD0)
Address Offset: 0x203DD8
Reset value: 0xFEEDFACE
0
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PWD31 PWD30 PWD29 PWD28 PWD27 PWD26 PWD25 PWD24 PWD23 PWD22 PWD21 PWD20 PWD19 PWD18 PWD17 PWD16
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
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PWD15 PWD14 PWD13 PWD12 PWD11 PWD10 PWD09 PWD08 PWD07 PWD06 PWD05 PWD04 PWD03 PWD02 PWD01 PWD00
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
Figure 17-21. Non-volatile private censorship PassWord 0 register (NVPWD0)
17-34
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor