PXD10RM Datasheet, PDF (1034/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Address: QSPI_BASE + 0x10C
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
RDCTR
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
RDBFL
00000000
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-14. RX Buffer Status Register (QSPI_RBSR)
Table 30-27. QSPI_RBSR Field Descriptions
Field
RDCTR
RBBFL
Description
Read Counter, indicates how many bytes have been removed from the RX Buffer by host accesses.
It is incremented by 4 on each successful write on the QSPI_SFMFR[RBDF] bit. For further details
please refer to Section 30.4.4.3, AHB RX Data Buffer (QSPI_ARDB)” and Section 30.5.3.3.2, Host
Read of the QuadSPI Module Internal Buffers”.
RX Buffer Fill Level, indicates how many bytes are still available for read in the RX Buffer.
30.4.3.15 RX Buffer Data Registers 0–14 (QSPI_RBDR0–QSPI_RBDR14)
The QSPI_RBDR registers provide access to the individual entries in the RX Buffer. Refer to Table 30-45
for the byte ordering scheme.
30-30
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor