PXD10RM Datasheet, PDF (619/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 17-51. UT0 field descriptions
Field
Description
0 UTE: User Test Enable (Read/Clear)
This status bit gives indication when User Test is enabled. All bits in UT0-2 and UMISR0-4 are locked when
this bit is 0.
This bit is not writeable to a 1, but may be cleared. The reset value is 0.
The method to set this bit is to provide a password, and if the password matches, the UTE bit is set to
reflect the status of enabled, and is enabled until it is cleared by a register write.
For UTE the password 0xF9F99999 must be written to the UT0 register.
1:7 Reserved (Read Only).
Write these bits has no effect and read these bits always outputs 0.
8:15 DSI7-0: Data Syndrome Input 7-0 (Read/Write)
These bits represent the input of Syndrome bits of ECC logic used in the ECC Logic Check. The DSI7-0
correspond to the 8 syndrome bits on a double word.
These bits are not accessible whenever MCR.DONE or UT0.AID are low: reading returns indeterminate
data while writing has no effect.
0: The syndrome bit is forced at 0.
1: The syndrome bit is forced at 1.
16:24 Reserved (Read Only).
Write these bits has no effect and read these bits always outputs 0.
25 Reserved (Read/Write).
This bit can be written and its value can be read back, but there is no function associated.
This bit is not accessible whenever MCR.DONE or UT0.AID are low: reading returns indeterminate data
while writing has no effect.
26 MRE: Margin Read Enable (Read/Write)
MRE enables margin reads to be done. This bit, combined with MRV, enables regular user mode reads to
be replaced by margin reads.
This bit is not accessible whenever MCR.DONE or UT0.AID are low: reading returns indeterminate data
while writing has no effect.
0: Margin reads are not enabled, all reads are User mode reads.
1: Margin reads are enabled.
27 MRV: Margin Read Value (Read/Write)
If MRE is high, MRV selects the margin level that is being checked. Margin can be checked to an erased
level (MRV=1) or to a programmed level (MRV=0).
This bit is not accessible whenever MCR.DONE or UT0.AID are low: reading returns indeterminate data
while writing has no effect.
0: Zero’s (programmed) margin reads are requested (if MRE=1).
1: One’s (erased) margin reads are requested (if MRE=1).
28 EIE: ECC data Input Enable (Read/Write)
EIE enables the ECC Logic Check operation to be done.
This bit is not accessible whenever MCR.DONE or UT0.AID are low: reading returns indeterminate data
while writing has no effect.
0: ECC Logic Check is not enabled.
1: ECC Logic Check is enabled.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
17-69