PXD10RM Datasheet, PDF (1119/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

33.3.3.3 HIGH_PERIOD register
Offset 0x08
Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
HIGH_PERIOD
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-6. HIGH_PERIOD Register
Table 33-6. HIGH_PERIOD Field Descriptions
Field
Description
0–31
HIGH_PERIOD
32-bit value loaded into bits [0:31] of the HIGH_PERIOD counter. It defines the on period for
sound when operating in Periodic mode (that is, when bit 2 of MODE_SEL[SOUND_CTRL]
is 0b1).
33.3.3.4 LOW_PERIOD register
Offset 0x0C
Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
LOW_PERIOD
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-7. LOW_PERIOD Register
Table 33-7. LOW_PERIOD Field Descriptions
Field
0–31
LOW_PERIOD
Description
32-bit value loaded into bits [0:31] of the LOW_PERIOD counter. It defines the off period for
sound when operating in Periodic mode (that is, when bit 2 of MODE_SEL[SOUND_CTRL]
is 0b1).
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
33-5