PXD10RM Datasheet, PDF (926/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

25.3.2.7 Debug Mode Transition Status Register (ME_DMTS)
Address 0xC3FD_C018
Access: Supervisor read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 25-8. Debug Mode Transition Status Register (ME_DMTS)
This register provides the status of different factors which influence mode transitions. It is used to give an
indication of why a mode transition indicated by ME_GS.S_MTRANS may be taking longer than
expected.
NOTE
The ME_DMTS register does not indicate whether a mode transition is
ongoing. Therefore, some ME_DMTS bits may still be asserted after the
mode transition has completed.
Table 25-10. Debug Mode Transition Status Register (ME_DMTS) Field Descriptions
Field
Description
MPH_BUSY
MC_ME/MC_PCU Handshake Busy indicator — This bit is set if the MC_ME has requested a mode change from
the MC_PCU and the MC_PCU has not yet responded. It is cleared when the MC_PCU has responded.
0 Handshake is not busy
1 Handshake is busy
PMC_PROG MC_PCU Mode Change in Progress indicator — This bit is set if the MC_PCU is in the process of powering up
or down power domains. It is cleared when all power-up/down processes have completed.
0 Power-up/down transition is not in progress
1 Power-up/down transition is in progress
CORE_DBG Processor is in Debug mode indicator — This bit is set while the processor is in debug mode.
0 The processor is not in debug mode
1 The processor is in debug mode
25-20
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor