PXD10RM Datasheet, PDF (577/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

17.2.6.14 Non-volatile Bus Interface Unit 2 register (NVBIU2)
Address Offset: 0x203E00
Delivery value: 0xXXXXXXXX
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
BI231 BI230 BI229 BI228 BI227 BI226 BI225 BI224 BI223 BI222 BI221 BI220 BI219 BI218 BI217 BI216
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
BI215 BI214 BI213 BI212 BI211 BI210 BI209 BI208 BI207 BI206 BI205 BI204 BI203 BI202 BI201 BI200
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
Figure 17-12. Non-volatile Bus Interface Unit 2 register (NVBIU2)
The Bus Interface Unit 2 Register provides a mean for BIU specific information, or BIU configuration
information to be stored. Please see Section 17.4.3.2.3, Platform Flash Access Protection Register
(PFAPR),” for more information about register description.
This register is present only in Code Flash 0.
The BIU2 register has a related Non-volatile Bus Interface Unit 2 register located in Shadow Sector that
contains the default reset value for BIU2: The NVBIU2 register is read during the reset phase of the Flash
Module and loaded into the BIU2.
The NVBIU2 register is a 64-bit register, the 32 most significative bits of which (bits 63-32) are ‘don’t
care’ and eventually used to manage ECC codes.
Table 17-22. BIU2 field descriptions
Field
Description
0:31 BI231-00: Bus Interface unit 2 31-00 (Read/Write)
The BI231-00 generic registers are reset based on the information stored in NVBIU2.
The writability of the bits in this register can be locked.
The use of this bus is SoC specific.
NOTE
On this device, BIU2 and PFAPR are the same register. Your software may
refer to either register. For clarity, however, it is recommended that you use
PFAPR.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
17-27