PXD10RM Datasheet, PDF (1226/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Address : Base + 0x0002
Access: Read Only
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
IVLD
DVLD
W
RESET: _x
x
x
x
x
x
x
x
x
x
1
x
x
x
x
1
= Reserved
Figure 38-3. System Memory Configuration (MEMCONFIG) Register
Table 38-4. MEMCONFIG Field Descriptions
Field
Description
IVLD
Code Flash Valid. This bit identifies whether or not the on-chip Code Flash is accessible in the system
memory map. The Flash may not be accessible due to security limitations, or because there is no Flash in
the system.
1 Code Flash is accessible
0 Code Flash is not accessible
DVLD
Data Flash Valid. This bit identifies whether or not the on-chip Data Flash is visible in the system memory
map. The Flash may not be accessible due to security limitations, or because there is no Flash in the
system.
1 Data Flash is visible
0 Data Flash is not visible
READ
WRITE
Table 38-5. MEMCONFIG Allowed Register Accesses
8-bit
Allowed
Not Allowed
16-bit
Allowed
Not Allowed
32-bit
Allowed
(also reads STATUS register)
Not Allowed
38.2.2.3 Error Configuration
The Error Configuration register is a read-write register that controls the error handling of the system.
Address : Base + 0x0006
Access: Read/Write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R₀
0
0
0
0
0
0
0
0
0
0
0
0
0
PAE RAE
W
RESET: ₀
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Reserved
Figure 38-4. Error Configuration (ERROR) Register
38-4
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor