PXD10RM Datasheet, PDF (755/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 21-1. Interrupt sources available (continued)
Interrupt sources
Stepper Stall Detect 5 (SSD5)
Liquid Crystal Display 0 (LCD0)
QuadSPI
Number Available
1
1
6
21.3 Block diagram
Figure 21-1 is a block diagram of the interrupt controller (INTC).
Software
Set/Clear
Interrupt
Registers
Priority
Select
Registers
Module
Configuration ^Hardware
Register ^{Vector Enable}
1
Peripheral
Interrupt
Requests
Flag Bits
8
n¹
n¹ x
4-bits
Priority
Arbitrator
Highest
Priority
Interrupt
Requests
n¹
Request
Selector
4 Highest Priority
Lowest
Vector
Interrupt
Request
n¹
End of
Interrupt
Register
Vector
Encoder
Vector Table
Entry Size ¹
Interrupt
Vector
9
Processor 0
Interrupt
Acknowledge
Register
Interrupt
Vector
9
Pushed
New
Priority
Priority
4
4
Processor 0
Priority
LIFO
Popped
Priority
4
Processor 0
Current
Priority
Register
Current
Priority
4
Priority
Comparator
Update Interrupt Vector
1
Interrupt
Request to
Processor
1
Interrupt Acknowledge
1
Memory Mapped Registers
Push/Update/Acknowledge
Pop
1 Slave
Interface
1 ^{for Reads}
& Writes
Non-Memory Mapped Logic
1 _{The total number of interrupt sources is 122, which includes 16 reserved sources and 8 software sources.}
Figure 21-1. INTC Block Diagram
Peripheral
Bus
21.4 Modes of operation
21.4.1 Normal Mode
In normal mode, the INTC has two handshaking modes with the processor: software vector mode and
hardware vector mode.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
21-3