PXD10RM Datasheet, PDF (184/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

• Contains a set of registers to control peripheral clock selection
• Supports multiple clock sources and maps their address spaces to its memory map
• Generates an output clock
• Guarantees glitch-less clock transitions when changing the system clock selection
• Supports 8-, 16- and 32-bit wide read/write accesses
8.4.1.3 Modes of Operation
This section describes the basic functional modes of the MC_CGM.
8.4.1.3.1 Normal and Reset Modes of Operation
During normal and reset modes of operation, the clock selection for the system clock is controlled by the
MC_ME.
8.4.2 External Signal Description
The MC_CGM delivers an output clock to the PH[4] pin for off-chip use and/or observation.
8.4.3
Memory Map and Register Definition
Table 8-2. MC_CGM Register Description
Address
Name
0xC3FE_0370 CGM_OC_EN
0xC3FE_0374 CGM_OCDS_SC
0xC3FE_0378 CGM_SC_SS
0xC3FE_037C CGM_SC_DC0
0xC3FE_037D CGM_SC_DC1
0xC3FE_037E CGM_SC_DC2
0xC3FE_0380 CGM_AC0_SC
0xC3FE_0388 CGM_AC1_SC
0xC3FE_038C CGM_AC1_DC0
0xC3FE_0398 CGM_AC2_SC
0xC3FE_0394 CGM_AC2_DC0
0xC3FE_0398 CGM_AC3_SC
Description
Output Clock Enable
Output Clock Division Select
System Clock Select Status
System Clock Divider Configuration 0
System Clock Divider Configuration 1
System Clock Divider Configuration 2
Aux Clock 0 Select Control
Aux Clock 1 Select Control
Aux Clock 1 Divider Configuration 0
Aux Clock 2 Select Control
Aux Clock 2 Divider Configuration 0
Aux Clock 3 Select Control
Size
word
byte
byte
byte
byte
byte
word
word
byte
word
byte
word
NOTE
Any access to unused registers as well as write accesses to read-only
registers will:
• Not change register content
Access
read/write
read/write
read
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
PXD10 Microcontroller Reference Manual, Rev. 1
8-6
Freescale Semiconductor
Preliminary—Subject to Change Without Notice