PXD10RM Datasheet, PDF (135/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 5-5. ADC digital registers (continued)
Register name
Reserved
Decode Signals Delay Register (DSDR)
Power-down Exit Delay Register (PDEDR)
Reserved
Channel 32 Data Register (CDR32)
Channel 33 Data Register (CDR33)
Channel 34 Data Register (CDR34)
Channel 35 Data Register (CDR35)
Channel 36 Data Register (CDR36)
Channel 37 Data Register (CDR37)
Channel 38 Data Register (CDR38)
Channel 39 Data Register (CDR39)
Channel 40 Data Register (CDR40)
Channel 41 Data Register (CDR41)
Channel 43 Data Register (CDR43)
Channel 44 Data Register (CDR44)
Channel 45 Data Register (CDR45)
Channel 46 Data Register (CDR46)
Channel 47 Data Register (CDR47)
Channel 48 Data Register (CDR48)
Reserved
Channel 64 Data Register (CDR64)
Channel 65 Data Register (CDR65)
Channel 66 Data Register (CDR66)
Channel 67 Data Register (CDR67)
Channel 68 Data Register (CDR68)
Channel 69 Data Register (CDR69)
Channel 70 Data Register (CDR70)
Channel 71 Data Register (CDR71)
Reserved
Address offset (hex.)
0C0
0C4
0C8
0CC .. 17C
180
184
188
18C
190
194
198
19C
1A0
1A4
1AC
1B0
1B4
1B8
1BC
1C0
1C4 .. 1FC
200
204
208
20C
210
214
218
21C
220 .. 2FC
Reset value
—
0x0000_0000
0x0000_0000
—
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
—
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
—
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
5-13