PXD10RM Datasheet, PDF (565/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

SIZE2-0
011
100
101
110
111
Table 17-9. Array Space Size (continued)
Array Space Size
Reserved (1024KB)
Reserved (1536KB)
Reserved (2048KB)
64KB
Reserved
Table 17-10. Low Address Space configuration
LAS2-0
000
001
010
011
100
101
110
111
Low Address Space Sectorization
Reserved
2128 KB
32 KB + 216 KB + 232 KB + 128 KB
Reserved
Reserved
Reserved
4 x 16KB
Reserved
Table 17-11. Mid Address Space configuration
MAS
0
1
Mid Address Space Sectorization
2128 KB or 0 KB
Reserved
A number of MCR bits are protected against write when another bit, or set of bits, is in a specific state.
These write locks are covered on a bit by bit basis in the preceding description, but those locks do not
consider the effects of trying to write two or more bits simultaneously.
The Flash Module does not allow the user to write bits simultaneously which would put the device into an
illegal state. This is implemented through a priority mechanism among the bits. The bit changing priorities
are detailed in the following table.
Table 17-12. MCR Bits Set/Clear Priority Levels
Priority Level
1
2
3
4
MCR Bits
ERS
PGM
EHV
ESUS
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
17-15