PXD10RM Datasheet, PDF (616/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 17-47. LMS field descriptions (continued)
Field
Description
14:15
MSL1-0: Mid address space block SeLect 1-0 (Read/Write)
A value of 1 in the select register signifies that the block is selected for erase.
A value of 0 in the select register signifies that the block is not selected for erase. The reset value for the
select register is 0, or unselected.
All the MSL1-0 are not used for this memory cut that is all mapped in low address space.
The blocks must be selected (or unselected) before doing an erase interlock write as part of the Erase
sequence. The select register is not writable once an interlock write is completed or if a high voltage
operation is suspended.
In the event that blocks are not present (due to configuration or total memory size), the corresponding MSL
bits will default to unselected, and will not be writable. The reset value will always be 0, and register writes
will have no effect.
In the 80 KB Flash Macrocell bits MSL1-0 are read-only and locked at 0.
0: Mid Address Space Block is unselected for Erase.
1: Mid Address Space Block is selected for Erase.
16:31
LSL15-0: Low address space block SeLect 15-0 (Read/Write)
A value of 1 in the select register signifies that the block is selected for erase.
A value of 0 in the select register signifies that the block is not selected for erase. The reset value for the
select register is 0, or unselected.
LSL3-0 are related to sectors B1F3-0, respectively. LSL15-4 are not used for this memory cut.
The blocks must be selected (or unselected) before doing an erase interlock write as part of the Erase
sequence. The select register is not writable once an interlock write is completed or if a high voltage
operation is suspended.
In the event that blocks are not present (due to configuration or total memory size), the corresponding LSL
bits will default to unselected, and will not be writable. The reset value will always be 0, and register writes
will have no effect.
In the 80 KB Flash Macrocell bits LSL15-4 are read-only and locked at 0.
0: Low Address Space Block is unselected for Erase.
1: Low Address Space Block is selected for Erase.
17.3.6.9 High address space Block Select register (HBS)
Address Offset: 0x00014
Reset value: 0x00000000
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
0
0
0
0
0
0
0
0
0 HSL5 HSL4 HSL3 HSL2 HSL1 HSL0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0
r/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
Figure 17-32. High address space Block Select register (HBS)
The High Address Space Block Select register provides a means to select blocks to be operated on during
erase.
17-66
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor