PXD10RM Datasheet, PDF (1117/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

33.3 Memory map and register definition
33.3.1 Memory map
Table 33-2. SGL Memory Map
Address Offset
Register
0x00
MODE_SEL register
0X04
SOUND_DURATION register
0X08
HIGH_PERIOD register
0X0C
LOW_PERIOD register
0X10
SGL_STATUS register
1 _{Note that R/W registers may contain some read-only or write-only bits.}
Access Reset Value
R/W¹ 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R
0x00
33.3.2 Register summary
The conventions in Figure 33-3 serve as a key for the register summary and individual register diagrams.
Always 1 Always 0 R/W BIT
reads 1
reads 0
bit
BIT Write-
Write 1 BIT Self-clear 0 N/A
only bit _BIT to clear _w1c
bit _BIT
Figure 33-3. Key to register fields
33.3.3 Register descriptions
33.3.3.1 MODE_SEL register
Offset 0x00
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
M_P SOUND_CTRL
W
CH2_SEL
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PRE
W
CH1_SEL
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-4. MODE_SEL REGISTER
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
33-3