PXD10RM Datasheet, PDF (744/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

MSB
LSB
SCL
1 2 34 5 6 78 9
MSB
LSB
1 2 34 5 6 78 9
SDA
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
XXX D7 D6 D5 D4 D3 D2 D1 D0
Start
Signal
Calling Address
Read/ Ack
Write ^Bit
MSB
LSB
SCL
1 2 34 5 67 89
Data Byte
No Stop
Ack Signal
Bit
MSB
LSB
1 234 5 678 9
SDA AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
XX
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
Start
Signal
Calling Address
Read/ Ack Repeated
Write ^Bit
Start
Signal
New Calling Address
Read/ No Stop
Write
Ack Signal
Bit
Figure 20-11. I²C Bus Transmission Signals
20.5.2.1 START Signal
When the bus is free, i.e. no master device is engaging the bus (both SCL and SDA lines are at logical
high), a master may initiate communication by sending a START signal. As shown in Figure 20-11, a
START signal is defined as a high-to-low transition of SDA while SCL is high. This signal denotes the
beginning of a new data transfer (each data transfer may contain several bytes of data) and brings all slaves
out of their idle states.
SDA
SCL
START condition
STOP condition
Figure 20-12. Start and Stop conditions
20-14
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor