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PXD10RM Datasheet, PDF (79/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller
3.3 Pad configuration during reset phases
All pads have a fixed configuration under reset.
During the power-up phase, all pads are forced to tristate.
After power-up phase, all pads are floating with the following exceptions:
• PB[5] (FAB) is pull-down. Without external strong pull-up the device starts fetching from flash.
• RESET pad is driven low. This is released only after PHASE2 reset completion.
• Main oscillator pads (EXTAL, XTAL) are tristate.
• Nexus output pads (MDO[n], MCKO, EVTO, MSEO) are forced to output.
• The following pads are pull-up:
— PB[6]
— PH[0]
— PH[1]
— PH[3]
— EVTI
3.4 Voltage supply pins
Voltage supply pins are used to provide power to the device. Two dedicated pins are used for 1.2 V
regulator stabilization.
There is a preferred power-up sequence for devices in the PXD10 family. That sequence is described in
the following paragraphs.
Broadly, the supply voltages can be grouped as follows:
• VREG HV supply (VDDR)
• Generic IO supply or noise free supply
— VDDA
— VDDE_A
— VDDE_B
— VDDE_C
— VDDE_E
— VDDMA
— VDDMB
— VDDMC
— VDDPLL
• LV supply (VDD12)
The preferred order of ramp up is as follows:
1. Generic IO supply or noise free supply
PXD10 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
3-5
Preliminary—Subject to Change Without Notice