PXD10RM Datasheet, PDF (523/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

15.4.5.2 Active channel TCD reads
The DMA will read back the 'true' TCD.saddr, TCD.daddr, and TCD.nbytes values if read while a channel
is executing. The 'true' values of the saddr, daddr, and nbytes are the values the DMA engine is currently
using in its internal register file and not the values in the TCD local memory for that channel. The
addresses (saddr and daddr) and nbytes (decrements to zero as the transfer progresses) can give an
indication of the progress of the transfer. All other values are read back from the TCD local memory.
15.4.5.3 Preemption status
Preemption is only available when fixed arbitration is selected for both group and channel arbitration
modes. A preempt-able situation is one in which a preempt-enabled channel is running and a higher
priority request becomes active. When the DMA engine is not operating in fixed group, fixed channel
arbitration mode, the determination of the relative priority of the actively running and the outstanding
requests become undefined. Channel and/or group priorities are treated as equal (constantly rotating) when
round-robin arbitration mode is selected.
The TCD.active bit for the preempted channel remains asserted throughout the preemption. The preempted
channel is temporarily suspended while the preempting channel executes one iteration of the major loop.
Two TCD.active bits set at the same time in the overall TCD map indicates a higher priority channel is
actively preempting a lower priority channel.
The worst case latency when switching to a preempt channel is the summation of:
• arbitration latency (2 cycles)
• bandwidth control stalls (if enabled)
• the time to execute two read/write sequences (including AHB bus holds; a system dependency
driven by the slave devices or the crossbar)
15.4.6 Channel linking
Channel linking (or chaining) is a mechanism where one channel sets the TCD.start bit of another channel
(or itself) thus initiating a service request for that channel. This operation is automatically performed by
the DMA engine at the conclusion of the major or minor loop when properly enabled.
The minor loop channel linking occurs at the completion of the minor loop (or one iteration of the major
loop). The TCD.citer.e_link field are used to determine whether a minor loop link is requested. When
enabled, the channel link is made after each iteration of the major loop except for the last. When the major
loop is exhausted, only the major loop channel link fields are used to determine if a channel link should be
made. For example, with the initial fields of:
TCD.citer.e_link = 1
TCD.citer.linkch = 0xC
TCD.citer value = 0x4
TCD.major.e_link = 1
TCD.major.linkch = 0x7
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
15-53