PXD10RM Datasheet, PDF (858/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

23.7.2.12 LIN checksum field register (LINCFR)
Address: Base + 0x002C
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
R0
W
Reset 0
Field
0:23
CF[0:7]
24:31
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0000000
CF[0:7]
00000000 0 000000
Figure 23-18. LIN checksum field register (LINCFR)
Table 23-18. LINCFR field descriptions
Description
Reserved
Checksum bits
When CCD bit in LINCR1 is cleared these bits are read-only. When CCD bit is set, these bits are
read/write. See Table 23-4.
23.7.2.13 LIN control register 2 (LINCR2)
Address: Base + 0x0030
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0
00000000
IOBE IOPE
W
WURQ DDRQ DTRQ ABRQ HTRQ
Reset 0 1 * 0 0 0 0 0 0 0 0 0 0 0 0 0
* This bit resets to 1 for LINFlex_0 and 0 for LINFlex_1.
Figure 23-19. LIN control register 2 (LINCR2)
23-26
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor