PXD10RM Datasheet, PDF (304/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 11-14. DSPIx_PUSHR Field Descriptions (continued)
Field
Description
13–15
PCSx
Peripheral chip select x. Selects which CSx signals are asserted for the transfer.
0 Negate the CSx signal
1 Assert the CSx signal
Note: Use in SPI master mode only.
16–31 Transmit data. Holds SPI data for transfer according to the associated SPI command.
TXDATA
[0:15] Note: Use TXDATA in master and slave modes.
11.7.2.7 DSPI POP RX FIFO Register (DSPIx_POPR)
The DSPIx_POPR allows you to read the RX FIFO. Refer to Section 11.8.3.5, Receive First In First Out
(RX FIFO) Buffering Mechanism for a description of the RX FIFO operations. Eight or 16-bit read
accesses to the DSPIx_POPR fetch the RX FIFO data, and update the counter and pointer.
NOTE
Reading the RX FIFO field fetches data from the RX FIFO. Once the RX
FIFO is read, the read data pointer is moved to the next entry in the RX
FIFO. Therefore, read DSPIx_POPR only when you need the data. For
compatibility, configure the TLB (MMU table) entry for DSPIx_POPR as
guarded.
Address: Base + 0x0038
Access: R/O
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
RXDATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 11-8. DSPI POP RX FIFO Register (DSPIx_POPR)
11-22
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor