PXD10RM Datasheet, PDF (597/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

All the non-volatile Modify Protection registers can be programmed through a normal Double Word
Program operation at the related locations in Test Flash.
The non-volatile Modify Protection registers cannot be erased.
• The Non-volatile Modify Protection Registers are physically located in Test Flash their bits can be
programmed to ‘0’ only once and they can no more be restored to ‘1’.
• The Volatile Modify Protection Registers are Read/Write registers which bits can be written at ‘0’
or ‘1’ by the user application.
A software mechanism is provided to independently lock/unlock each Low, Mid and High Address Space
Block against program and erase.
Software locking is done through the LML (Low/Mid Address Space Block Lock Register) or HBL (High
Address Space Block Lock Register) registers.
An alternate means to enable software locking for blocks of Low Address Space only is through the SLL
(Secondary Low/Mid Address Space Block Lock Register).
All these registers have a non-volatile image stored in Test Flash (NVLML, NVHBL, NVSLL), so that the
locking information is kept on reset.
On delivery the Test Flash non-volatile image is at all ‘1’s, meaning all sectors are locked.
By programming the non-volatile locations in Test Flash the selected sectors can be unlocked.
Being the Test Flash One Time Programmable (i.e. not erasable), once unlocked the sectors cannot be
locked again.
Of course, on the contrary, all the volatile registers can be written at 0 or 1 at any time, therefore the user
application can lock and unlock sectors when desired.
17.2.7.3.2 Censored Mode
The Censored Mode information is stored in non-volatile Flash cells located in the Shadow Sector. This
information is read once during the Flash initialization phase following the exit from Reset and is stored
in Volatile registers that act as actuators.
The reset state of all the Volatile Censored Mode Registers is the protected state.
All the non-volatile Censored Mode registers can be programmed through a normal Double Word Program
operation at the related locations in the Shadow Sector.
The non-volatile Censored Mode registers can be erased by erasing the Shadow Sector.
• The non-volatile Censored Mode Registers are physically located in the Shadow Sector their bits
can be programmed to ‘0’ and eventually restored to ‘1’ by erasing the Shadow Sector.
• The Volatile Censored Mode Registers are registers not accessible by the user application.
The Flash Macrocell provides two levels of protection against piracy:
• If bits CW15-0 of NVSCI0 are programmed at 0x55AA and NVSC1 = NVSCI0 the Censored
Mode is disabled, while all the other possible values enable the Censored Mode.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
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