PXD10RM Datasheet, PDF (375/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Offset: 0x1F0
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0
00
W
Reset 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1
Figure 20.
Figure 12-23. Interrupt Mask Register (INT_MASK)
Table 12-25. INT_MASK Field Descriptions
Field
12
Mask the interrupt
M_P4_FIFO_HI_FLAG 1’b1: interrupt is masked
1’b0: Not masked
13
Mask the interrupt
M_P4_FIFO_LO_FLAG 1’b1: interrupt is masked
1’b0: Not masked
14
Mask the interrupt
M_P3_FIFO_HI_FLAG 1’b1: interrupt is masked
1’b0: Not masked
15
Mask the interrupt
M_P3_FIFO_LO_FLAG 1’b1: interrupt is masked
1’b0: Not masked
17
Mask the interrupt
M_DMA_TRANS_FINIS 1’b1: interrupt is masked
H
1’b0:Not masked
20
M_IPM_ERROR
Mask the interrupt
1’b1: interrupt is masked
1’b0:Not masked
Description
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
12-43